假果D代表兩個logical core實際上某D部件係shared, 兩個logical core一齊用果時processing power唔會double ...
KinChungE 發表於 2012-1-26 17:43 
轉得黎可能仲慢左 XD
咩叫所謂膠水4核?
之前有D 4核咪係2+2 既,粒U 係分開的,要access 另一邊要落北橋再上返去 ,intel core 有 shared cache , 我就唔明佢點access 另一邊- - 唔access 的話 4M+4M cache 佢share 極都係4M LOL
條 FSB 得咁多…要上上落落 SAD |