都未出, 你能否定嗎?
我只係帶出 bandwidth 高左唔等於會有好高效能
siuba 發表於 2015-5-21 16:02 
don't mystify
memory bandwidth is always the bottleneck for GPUs as they are throughput oriented.
you cannot double the number of execution units without doubling the bandwidth or else the EUs will be just laying there wasting power. Which is why L1/ L2 cache, address coalescing is implemented in modern GPUs or the eDRAM in Iris graphic. They are measures to maximize throughput when GDDR5 or system RAM is plateaued. |